GNOME Bugzilla – Bug 600940
VHDL calling graph doesn't work as expected
Last modified: 2009-12-30 13:38:49 UTC
When an entity instantiates another entity it won't be displayed in the calling graph. A short example would be ent1.vhd: entity ent1 is port ( signal sig1 : out std_logic ); end ent1; architecture ent1_arch of ent1 is begin end ent1_arch; ent2.vhd: entity ent2 is end ent2; architecture ent2_arch of ent2 is component ent1 is port ( signal sig1 : out std_logic ); end component signal ent1_sig1 : std_logic; begin ent1_instance: ent1 port map ( sig1 => ent1_sig1 ); end ent2_arch;
check out release Doxygen-1.6.1-20091027 and the calling graph should work
This bug was previously marked ASSIGNED, which means it should be fixed in doxygen version 1.6.2. Please verify if this is indeed the case and reopen the bug if you think it is not fixed (include any additional information that you think can be relevant).