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Test Project
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Entities | |
| behv | architecture |
Libraries | |
| ieee | |
Use Clauses | |
| std_logic_1164 | |
| std_logic_unsigned | |
Generics | |
| n | natural := 2 |
| number of bits of counter | |
Ports | |
| clk | in std_logic |
| clock | |
| clear | in std_logic |
| clear counter | |
| count | in std_logic |
| count down | |
| Q | out std_logic_vector ( n - 1 downto 0 ) |
| counter value | |
1.8.13